Cmd Timeout Error Easy Jtag

OCR READY TIMEOUT EMMC BAD Done. Disconnect eMMC from power lines and easy-jtag box connector (disconnect eMMCfrom box is important, because some voltage leakage via CMD, CLK, DAT0) 4. Make short testpoint TP to GND (solder small wire) 5. Plug eMMC power and connect Easy-Jtag box connector 6. Remove short TP to GND 7. Contribute to intel/OpenOCD development by creating an account on GitHub. Dismiss Join GitHub today. GitHub is home to over 50 million developers working together to host and review code, manage projects, and build software together. الصفحة 3-اخواني الجهاز 5300 سامسونغ بوكيت والتوصيلات كلها سليمة مية مية ولكني اعتقد ان المشكلة بالادابتر وتوصيل خطوط 1.8v و 2.8 z3x easy jtag مع العلم انا شاريه من يومين فقط وجربت توصيل emmc i9082.وتوصيل emmc g530h وكلهم نفس النتيجة تظهر.

  • OpenOCD JTAG and HiKey
    • What works?

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Hikey provides an unpopulated JTAG connector on its underside. It is relatively easy to hand solder on a proper connector and to use inexpensive JTAG interfaces to communicate with the board.

Currently the open-source JTAG debugging solutions are fairly immature for 64-bit ARM platforms. In general the Hikey should be considered a tool to help develop OpenOCD on rather than considering OpenOCD a tool to help you develop on a Hikey!

This page documents the current status, and provide instructions on to to get setup and working.

Soldering on the connector

The first step is to solder on the JTAG connector. The unpopulated header is at J10 on the underside of the circuit board. The connector that you need to buy is a “FTSH-105-01-L-DV”. It can be purchased from Farnell here (note the image is for a larger connector).

http://uk.farnell.com/samtec/ftsh-105-01-l-dv/header-1-27mm-smd-10way/dp/1667759

Cmd Time Out Error Easy Jtag

Once the connector is soldered on it should look something like this

JTAG interfaces

OpenOCD supports many different JTAG interface. The list of devices known to work with the HiKey board includes:

  • Bus Blaster v3 from Dangerous Prototypes. Set INTERFACE=interface/ftdi/dp_busblaster_kt-link.cfg for this adapter. Before connecting the BBv3 to the HiKey ensure the interface is not configured to provide power to the target (JP4, the target power select jumper, must be disconnected) otherwise the HiKey could be damaged. The BBv3 buffer logic must be programmed with SVF from https://github.com/bharrisau/busblaster .
  • Flyswatter2 from Tin Can Tools. Set INTERFACE=interface/ftdi/flyswatter2.cfg for this adapter.
  • J-Link from Segger. Set INTERFACE=interface/jlink.cfg.

Most JTAG interfaces provide a standard ARM 20 pin socket (2x10 2.54mm) meaning an adapter board is required to convert from this to the SWD (2x5 1.27mm). This are available from a variety of sources including:

  • ARM-JTAG-20-10 from Olimax. This board includes the 10-pin SWD cable and has a female 20 pin IDC connector allowing it to connect directly to most JTAG interfaces without any additional cabling.
  • JTAG to SWD Cable Adapter Board and 150mm 2x5 SWD cable from Adafruit Industries. This board has a male IDC connector meaning an additional 20 pin IDC cable is required to connect to most JTAG interfaces.

Once this is all connected it should look something like thisFT2232H

OpenOCD source code

The armv8 code isn’t currently merged to mainline, the latest code I’ve found is on the following gerrit http://openocd.zylin.com/#/c/2523/.

A GIT repo which is based off this gerrit which also includes a includes a hi6220 configuration file can be cloned here

Compiling OpenOCD

Install any pre-requisite libraries (e.g. FTDI libs if your JTAG is FTDI based)

Running OpenOCD

Firstly ensure everything is connected like the photo above, and power on the board. Then issue the following command

If all goes well you should see trace like the following: -

If you see trace like this:

Cmd timeout error easy jtag tutorial

… then check the following:

  • Soldering of the JTAG connector
  • The cables are plugged in securely
  • The board is correctly powered.
  • Everything is connected like in the photo above

Using OpenOCD Telnet interface

Once openocd has connected to the target you can connect via the telnet interface.

What works?

Dumping the processor registers

This command was issued whilst sat at the u-boot prompt.

Setting a breakpoint

Currently it is not possible to resume the target once Linux has booted (although it can be halted and examined). At present preakpoints are only effective for bootloader development.

and in u-boot force the processor to jump to this address (which is the start of u-boot)

you can see in OpenOCD telnet we hit the breakpoint

now remove the breakpoint so we can try single stepping

Single stepping

Currently it is not possible to resume the target once Linux has booted (although it can be halted and examined). At present single stepping is only effective for bootloader development.

We can validate the last few single steps, with a disassembly of the u-boot binary. You can see that that to validate what happened

Writing to memory

and then validate with u-boot

Reading from memory

target state: halted target halted in ARM64 state due to debug-request, current mode: EL2H cpsr: 0x800003c9 pc: 0x3ef7e908 MMU: disabled, D-Cache: disabled, I-Cache: disabled

and then validate with u-boot

Debugging U-Boot with GDB

If U-Boot is sat at the prompt, then it has been relocated from its statically linked address 0x35000000. On my system it gets relocated to 0x3ef47000.

What isn’t working

Probably lots of things - add issues here when you find them :)

Better still debug and fix it!

Sometimes I hit the following GDB assertion when doing a backtrace in U-Boot

Cmd Timeout Error Easy Jtag Software

  • /cbuild/slaves/oorts/crosstool-ng/builds/aarch64-linux-gnu-linux/.build/src/gdb-linaro-7.6.1-2013.10/gdb/regcache.c:178: internal-error: register_size: Assertion `regnum >= 0 && regnum < (gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch))’ failed.

The Xilinx System Debugger CLI (XSDB) JTAG commands can be used to perform raw JTAG shifts, get/set device properties, lock/unlock JTAG cable, etc.

The following commands are available:

jtag targets

Description

List JTAG targets or switch between JTAG targets.

Usage

jtag targets

List available JTAG targets

jtag targets <target id>

Select <target id> as active JTAG target

Cmd Timeout Error Easy Jtag Pinout

jtag sequence

Description

Create JTAG sequence object.

Usage

The jtag sequence command creates a new sequence object. After creation the sequence is empty. The following sequence object commands are available:

sequence state new-state [count]

Move JTAG state machine to <new-state> and then generate <count> JTAG clocks. If <count> is given and <new-state> is not a looping state (RESET, IDLE, IRSHIFT, IRPAUSE, DRSHIFT or DRPAUSE) then state machine will move towards RESET state.

sequence irshift [options] bits [data]

Shift data in IRSHIFT or DRSHIFT state. Data is either given as the last argument or, if -tdi option is given, then data will be all zeros or all ones depending on the argument given to -tdi.

Available options:

  • -tdi <value>
    TDI value to use for all clocks in SHIFT state.
  • -binary
    Format of <data> is binary, for example data from a file or from binary format.
  • -integer
    Format of <data> is an integer. The least significant bit of data is shifted first.
  • -bits
    Format of <data> is a binary text string. The first bit in the string is shifted first.
  • -hex
    Format of <data> is a hexadecimal text string. The least significant bit of the first byte in the string is shifted first.
  • -capture
    Capture TDO data during shift and return from sequence run command.
  • -state <new-state>
    State to enter after shift is complete. The default is RESET.

sequence delay usec

Generate delay between sequence commands. No JTAG clocks will be generated during the delay. The delay is guaranteed to be at least <usec> microseconds, but can be longer for cables that do not support delays without generating JTAG clocks.

sequence get_pin pin

Get value of <pin>. Supported pins is cable specific.

sequence set_pin pin value

Set value of <pin> to <value>. Supported pins is cable specific.

sequence atomic enable

Set or clear atomic sequences. This is useful to creating sequences that are guaranteed to run with precise timing or fail. Atomic sequences should be as short as possible to minimize the risk of failure.

sequence run [options]

Run JTAG operations in sequence for the currently selected jtag target. This command will return the result from shift commands using -capture option and from get_pin commands.

Available options:

  • -binary
    Format return value(s) as binary. The first bit shifted out is the least significant bit in the first byte returned.
  • -bits
    Format return value(s) as binary text string. The first bit shifted out is the first character in the string.
  • -hex
    Format return value(s) as hexadecimal text string. The first bit shifted out is the least significant bit of the first byte of the in the string.
  • -single
    Combine all return values as a single piece of data.
    Without this option the return value is a list with one entry for every shift with -capture and every get_pin.

sequence clear

Remove all commands from sequence.

sequence delete

Delete sequence.

Example

set seqname [jtag sequence]

$seqname state RESET

$seqname drshift -capture -tdi 0 256

set result [$seqname run]

$seqname delete

jtag device_properties

Description

Get/set device properties.

Usage

jtag device_properties idcode

Get JTAG device properties associated with <idcode>

jtag device_properties key value ...

Set JTAG device properties

Example

jtag device_properties 0x4ba00477

Return dict containing device properties associated with idcode 0x4ba00477

jtag device_properties {idcode 0x4ba00477 mask 0xffffffff name arm_dap irlen 4}

Set device properties for idcode 0x4ba00477

jtag lock

Description

Lock JTAG scan chain.

Usage

jtag lock [timeout]

Lock JTAG scan chain containing current JTAG target.

Wait for scan chain lock to be available and then lock it. If <timeout> is specified the wait time is limited to <timeout> milliseconds.

The JTAG lock prevents other clients from performing any JTAG shifts or state changes on the scan chain. Other scan chains can be used in parallel.

The jtag run_sequence command will ensure that all commands in the sequence are performed in order so the use of jtag lock is only needed when multiple jtag run_sequence commands needs to be done without interruption.

Note: A client should avoid locking more than one scan chain since this can cause dead-lock.

jtag unlock

Description

Unlock JTAG scan chain.

Usage

jtag unlock

Unlock JTAG scan chain containing current JTAG target

jtag claim

Description

Claim JTAG device.

Usage

jtag claim mask

Set claim mask for current JTAG device

This command will attempt to set the claim mask for the current JTAG device. If any set bits in <mask> are already set in the claim mask then this command will return error 'already claimed'.

The claim mask allow clients to negotiate control over JTAG devices. This is different from jtag lock in two ways:

  • It is specific to a device in the scan chain.
  • Any clients can perform JTAG operations while the claim is in effect.

Note: Currently claim is used to disable the hw_server debugger from controlling microprocessors on ARM DAP devices and FPGA devices containing Microblaze processors.

jtag disclaim

Description

Disclaim JTAG device.

Usage

jtag disclaim mask

Clear claim mask for current JTAG device

jtag frequency

Description

Get/set JTAG frequency.

Usage

jtag frequency

Get JTAG clock frequency for current scan chain

jtag frequency -list

Get list of supported JTAG clock frequencies for current scan chain

jtag frequency frequency

Set JTAG clock frequency for current scan chain

jtag frequency

Get JTAG clock frequency for current scan chain

Related Concepts
Related Reference

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